The LimeSDR Mini development board is a hardware platform for developing and prototyping high-performance and logic-intensive digital and RF designs that use Altera’s MAX 10 FPGA and Lime Microsystems’ LMS7002M RF transceiver.

LimeSDR vs LimeSDR Mini

The LimeSDR and LimeSDR Mini are members of the same family of software-defined radios. One does not replace the other. Rather, they are complementary.

Simply put, the LimeSDR Mini is a smaller, less expensive version of the original LimeSDR. However, it still packs a punch - at its core, the LimeSDR Mini uses the same LMS7002M radio transceiver as its big sibling. The Mini has two channels instead of four, and, by popular demand, SMA connectors instead of micro U.FL connectors.

We’ve already shipped thousands of LimeSDR boards and they are now available for purchase from stock. The LimeSDR Mini is built on the LimeSDR supply chain, dev tools, and community in a way that makes software-defined radio more accessible than ever.

Features & Specfications

RF transceiver: Lime Microsystems LMS7002M
FPGA: Altera MAX 10 (10M16SAU169C8G)
- 169-pin FBGA package
- 16 K Les
- 549 KB M9K memory
- 2,368 KB user flash memory
- 4 x fractional phase locked loops (PLLs)
- 45 x 18x18-bit multipliers
- 130 x general purpose input/output (GPIO)
- Single supply voltage
- Flash feature
- FPGA configuration via JTAG
EEPROM memory: 2 x 128 KB for RF transciever MCU firmware and data
Flash memory: 1 x 4 MB flash memory for data
General user inputs/outputs:
- 2 x dual color (red + green) LED
- 8 x FPGA GPIO pinheader (3.3 V)
Connectivity:
- USB 3.0 Type-A (FTDI FT601 controller)
- 2 x coaxial RF (SMA) connectors (each can be switched between high and low frequency bands)
- U.FL connector for external clock source
- FPGA GPIO headers
- FPGA JTAG connector
Clock system:
- 30.72 MHz onboard VCTCXO
- Possibility to tune VCTCXO with onboard DAC
- External clock input via U.FL connector
Board dimensions: 69 mm x 31.4 mm