• Best-in-class Performance: 2 x 2 MIMO, 120 MSPS SISO / 90 MSPS MIMO, and more
• Compact Form Factor: as a Mini PCIe card, it’s the smallest commercially available SDR
• Thermal Coupling: well-designed thermal interface to a heatsink
• Stable Clock: accurate enough for cellular standards
• GPSDO: on-board GPS disciplined oscillator
• Synchronized Clocks: share the same clock source across many boards
• SIM Card Reader: appears as a typical USB serial SIM card reader
• High-speed GPIO: 12 total, of which eight can form four matched LVDS lines

If You’ve Ever Cursed Your SDR…

XTRX isn’t for everyone. We expect most people interested in XTRX to already have some experience with SDRs. If you’ve never used an SDR before, XTRX might be a bit overwhelming for you. XTRX might be right for you if you have:

• deployed SDR-based solutions in the field
• wanted to develop a massive MIMO system only to realize you don’t have $1 million
• cursed your SDR (or USB) for its latency, reliability, or cables
• yearned to level-up your SDR skills with cutting-edge equipment
• If this describes you, or you are looking for a better SDR, fear not and read on!

• RF Chipset: Lime Microsystems LMS7002M FPRF
• FPGA Chipset: Xilinx Artix 7 35T (CS) / 50T (Pro)
• Channels: 2 × 2 MIMO
• RF Output Power: 0 to 10dBm depending on frequency
• Sample Rate: ~0.2 MSPS to 120 MSPS SISO / 90 MSPS MIMO
• Tuning Range: 30 MHz - 3.8 GHz
• Rx/Tx Range:

1. 100 kHz - 3.8 GHz with signal level degradation
2. 10 MHz - 3.7 GHz

• PCIe Bandwidth:

1. PCIe x2 Gen 2.0: 8 Gbit/s
2. PCIe x1 Gen 2.0: 4 Gbit/s
3. PCIe x1 Gen 1.0: 2 Gbit/s

• Reference Clock:

1. Frequency: 26 MHz
2. Stability w/o GPS: 100 ppb or 500 ppb over the temperature range (depends on the XTRX version)
3. Stability w/GPS: <10 ppb stability after GPS/GNSS lock

• Form Factor: full-size Mini PCIe (30 × 51 mm)
• Bus Latency: <10 µs, stable over time
• Synchronization: synchronize multiple XTRX boards for massive MIMO
• GPIO:

1. FPC Edge Connector: four lines (usable as two diff-pairs)
2. Mini PCIe Reserved Pins: eight lines (including two diff-pairs, 1pps input, 1pps output, TDD switch control, and three LEDs)

Block Diagram:-

Documentation:

• Git Hub
• connectors pinout, 3D models, etc.
• Pre-built binaries and a "make world" instructions
• SDRangel
• osmo-trx
• Kalibrate
• gr-osmosdr

Package Includes:

• 1 x XTRX SDR